is a process that defines system level VPX interoperability for multi-vendor, multi-module, integrated systems environment. The OpenVPX process defines clear interoperability
points necessary for integration between Module to Module, Module to Backplane and Chassis.
Pixus has an experienced team of OpenVPX experts and can help you find or create the OpenVPX backplane profile for your application. We offer various data signal speed options and have optional testing services. Pixus is IS09001:2015 and ITAR registered.
The backplanes are typically 1.0” pitch, but 0.8” pitch is available in some configurations. Contact Pixus for details.
Pixus Technologies can modify this product to meet special customer requirements without NRE (minimum order placement is required).
Physical Dimensions Height: 3U
Width: Depending on slot #
Pitch: 1.0” or 0.8” standard
Connectors MultiGig RT-2 , RT-3 for higher speeds
Layers 14-18 layers typical
VITA Type VITA 65 for OpenVPX
Type VITA 46 for VPX base specification
Power 3.3V, 3.3V AUX, 5V, 12V options
Temperature Operating temperature: -40° to +85°C
Storage temperature: -55° to +90°C
PCB FR406 or equivalent, Nelco4000-13SI or equivalent for higher speeds
PCB traces 2 oz. power and ground standard
Conformal coating Upon request (See page 6 selection “J” for available options)
MTBF MIL Handbook 217-F @ TBD Hrs.
Certifications Designed to meet FCC, CE and EN/UL/TUV certifications where applicable
Warranty Two years